
`include "s:/define.v"
module ppiaddrmanager
#(
parameter PP_NUM_LOG2=6
)
(
input clk,
input rst_n,
input [PP_NUM_LOG2-1:0] pps_max_indx,
input [2**PP_NUM_LOG2-1:0] instr_reqs,
input [(2**PP_NUM_LOG2)*28-1:0] instr_req_addrs,
output reg [31:4] ireq_addr,
output reg ireq
);

genvar unpk_idx;genvar pk_idx;
wire [28-1:0] req_addrs [2**PP_NUM_LOG2-1:0];
`UNPACK_ARRAY(28,2**PP_NUM_LOG2,2**PP_NUM_LOG2,req_addrs,instr_req_addrs,p1,p2) 


reg [PP_NUM_LOG2-1:0] pp_indx;



reg no_req;
always@ (posedge clk or negedge rst_n)
begin
    if(~rst_n)
        begin
            no_req<=0;
        end
    else 
        begin
            no_req<=instr_reqs==0;
        end
end
always@ (posedge clk or negedge rst_n)
begin
    if(~rst_n)
        begin
            pp_indx<=0;
            ireq_addr<=0;
            ireq<=0;
        end
    else 
        begin
            if(no_req)
                ireq<=0;
            else
            begin
					pp_indx<=pp_indx<pps_max_indx ?(pp_indx+1):0;
                if(instr_reqs[pp_indx])
                begin                    
                    ireq_addr<=req_addrs[pp_indx];
                    ireq<=1;
                end
                else
                begin
                    ireq<=0; 
                end
            end
        end
end
endmodule
